1. Field of the Invention
The present invention relates to complimentary metal oxide semiconductor (CMOS) devices and, in particular, to a technique for eliminating impact ionization in high density CMOS circuit configurations allowing higher supplies and, thus, greater dynamic range.
2. Discussion of the Prior Art
While the advancement of CMOS technology has resulted in high density processes, a major limitation on the technology has been the allowable drain-to-source voltage (V.sub.ds) for n-type MOS transistors. The limitation, typically 5V, is due to shallow/sharp junctions and thin gate oxides which result in impact ionization.
Impact ionization is a phenomenon that occurs primarily in n-channel mos devices. When the supply voltage is increased above 5V to the point where the allowable V.sub.ds of the device is exceeded, electron mobility is such that collisions occur at the drain. These collisions ionize the semiconductor crystal and create electron/hole pairs. As illustrated in FIGS. 1A-1C, when this occurs, the drain-to-substrate current increases above normal leakage to contribute to the total drain current. This not only damages the device, but also reduces the output impedance for saturated device applications.
The above-stated problem limits supplies to 5V and, thus, reduces the maximum possible dynamic range for CMOS analog circuits. If this effect can be eliminated, higher dynamic ranges can be achieved. This would permit the higher density CMOS processes required for digital applications to be integrated with high dynamic range CMOS analog circuitry, taking full advantage of the advancements in the technology.